| Line 8: | Line 8: | ||
<font size="4">'''The Meyer Lectures on Digital Systems Design''' </font> | <font size="4">'''The Meyer Lectures on Digital Systems Design''' </font> | ||
| − | [ | + | [https://www.projectrhea.org/learning/slectures.php Slectures] by [[User:Rwayner|Robert Wayner]] |
© 2013 | © 2013 | ||
Revision as of 07:29, 26 February 2014
The Meyer Lectures on Digital Systems Design
© 2013
Contents
Foreword by Robert Wayner
Module 1: Boolean Algebra & CMOS logic structures
UNDER CONSTRUCTION
Module 2: Combinational Logic Circuits & Introduction to ABEL
TO BE DONE LATER
Module 3: Sequential Logic Circuits
TO BE DONE LATER
Module 4: Computer Functional Block & Arithmetic Logic Unit
TO BE DONE LATER
