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=Learning Objectives= | =Learning Objectives= | ||
#compare and contrast three different signed number notations: sign and magnitude, diminished radix, and radix | #compare and contrast three different signed number notations: sign and magnitude, diminished radix, and radix | ||
| − | + | #convert a number from one signed notation to another | |
| − | + | #describe how to perform sign extension of a number represented using any of the three notation schemes | |
| − | + | #perform radix addition and subtraction | |
| − | + | #describe the various conditions of interest following an arithmetic operation: overflow, carry/borrow, negative, zero | |
| − | + | #describe the operation of a half-adder and write equations for its sum (S) and carry (C) outputs | |
| − | + | #describe the operation of a full adder and write equations for its sum (S) and carry (C) outputs | |
| − | + | #design a “population counting” or “vote counting” circuit using an array of half-adders and/or fulladders | |
| − | + | #design an N-digit radix adder/subtractor circuit with condition codes | |
| − | + | #design a (signed or unsigned) magnitude comparator circuit that determines if A=B, A<B, or A>B | |
| − | + | #describe the operation of a carry look-ahead (CLA) adder circuit, and compare its performance to that of a ripple adder circuit | |
| − | + | #define the CLA propagate (P) and generate (G) functions, and show how they can be realized using a half-adder | |
| − | + | #write the equation for the carry out function of an arbitrary CLA bit position | |
| − | + | #draw a diagram depicting the overall organization of a CLA | |
| − | + | #determine the worst case propagation delay incurred by a practical (PLD-based) realization of a CLA | |
| − | + | #describe how a “group ripple” adder can be constructed using N-bit CLA blocks | |
| − | + | #describe the operation of an unsigned multiplier array constructed using full adders | |
| − | + | #determine the full adder arrangement and organization (rows/diagonals) needed to construct an NxM-bit unsigned multiplier array | |
| − | + | #determine the worst case propagation delay incurred by a practical (PLD-based) realization of an NxM-bit unsigned multiplier array | |
| − | + | #describe the operation of a binary coded decimal (BCD) “correction circuit” | |
| − | + | #design a BCD full adder circuit | |
| − | + | #design a BCD N-digit radix (base 10) adder/subtractor circuit | |
| − | + | #define computer architecture, programming model, and instruction set | |
| − | + | #describe the top-down specification, bottom-up implementation strategy as it pertains to the design of a computer | |
| − | + | #describe the characteristics of a “two address machine” | |
| − | + | #describe the contents of memory: program, operands, results of calculations | |
| − | + | #describe the format and fields of a basic machine instruction (opcode and address) | |
| − | + | #describe the purpose/function of each basic machine instruction (LDA, STA, ADD, SUB, AND, HLT) | |
| − | + | #define what is meant by “assembly-level” instruction mnemonics | |
| − | + | #draw a diagram of a simple computer, showing the arrangement and interconnection of each functional block | |
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Revision as of 09:00, 21 August 2013
The Meyer Lectures on Digital Systems
Module 3: Computer Logic Circuits
Objectives and Outcomes
© 2013
Learning Outcome
an ability to analyze and design computer logic circuits
Learning Objectives
- compare and contrast three different signed number notations: sign and magnitude, diminished radix, and radix
- convert a number from one signed notation to another
- describe how to perform sign extension of a number represented using any of the three notation schemes
- perform radix addition and subtraction
- describe the various conditions of interest following an arithmetic operation: overflow, carry/borrow, negative, zero
- describe the operation of a half-adder and write equations for its sum (S) and carry (C) outputs
- describe the operation of a full adder and write equations for its sum (S) and carry (C) outputs
- design a “population counting” or “vote counting” circuit using an array of half-adders and/or fulladders
- design an N-digit radix adder/subtractor circuit with condition codes
- design a (signed or unsigned) magnitude comparator circuit that determines if A=B, A<B, or A>B
- describe the operation of a carry look-ahead (CLA) adder circuit, and compare its performance to that of a ripple adder circuit
- define the CLA propagate (P) and generate (G) functions, and show how they can be realized using a half-adder
- write the equation for the carry out function of an arbitrary CLA bit position
- draw a diagram depicting the overall organization of a CLA
- determine the worst case propagation delay incurred by a practical (PLD-based) realization of a CLA
- describe how a “group ripple” adder can be constructed using N-bit CLA blocks
- describe the operation of an unsigned multiplier array constructed using full adders
- determine the full adder arrangement and organization (rows/diagonals) needed to construct an NxM-bit unsigned multiplier array
- determine the worst case propagation delay incurred by a practical (PLD-based) realization of an NxM-bit unsigned multiplier array
- describe the operation of a binary coded decimal (BCD) “correction circuit”
- design a BCD full adder circuit
- design a BCD N-digit radix (base 10) adder/subtractor circuit
- define computer architecture, programming model, and instruction set
- describe the top-down specification, bottom-up implementation strategy as it pertains to the design of a computer
- describe the characteristics of a “two address machine”
- describe the contents of memory: program, operands, results of calculations
- describe the format and fields of a basic machine instruction (opcode and address)
- describe the purpose/function of each basic machine instruction (LDA, STA, ADD, SUB, AND, HLT)
- define what is meant by “assembly-level” instruction mnemonics
- draw a diagram of a simple computer, showing the arrangement and interconnection of each functional block
