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'''Module 3: Computer Logic Circuits'''
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'''Module 4: Computer Logic Circuits'''
 
   
 
   
 
Objectives and Outcomes
 
Objectives and Outcomes

Revision as of 09:00, 21 August 2013


The Meyer Lectures on Digital Systems


Module 4: Computer Logic Circuits

Objectives and Outcomes

Slectures by Robert Wayner

© 2013


Learning Outcome

an ability to analyze and design computer logic circuits

Learning Objectives

  1. compare and contrast three different signed number notations: sign and magnitude, diminished radix, and radix
  2. convert a number from one signed notation to another
  3. describe how to perform sign extension of a number represented using any of the three notation schemes
  4. perform radix addition and subtraction
  5. describe the various conditions of interest following an arithmetic operation: overflow, carry/borrow, negative, zero
  6. describe the operation of a half-adder and write equations for its sum (S) and carry (C) outputs
  7. describe the operation of a full adder and write equations for its sum (S) and carry (C) outputs
  8. design a “population counting” or “vote counting” circuit using an array of half-adders and/or fulladders
  9. design an N-digit radix adder/subtractor circuit with condition codes
  10. design a (signed or unsigned) magnitude comparator circuit that determines if A=B, A<B, or A>B
  11. describe the operation of a carry look-ahead (CLA) adder circuit, and compare its performance to that of a ripple adder circuit
  12. define the CLA propagate (P) and generate (G) functions, and show how they can be realized using a half-adder
  13. write the equation for the carry out function of an arbitrary CLA bit position
  14. draw a diagram depicting the overall organization of a CLA
  15. determine the worst case propagation delay incurred by a practical (PLD-based) realization of a CLA
  16. describe how a “group ripple” adder can be constructed using N-bit CLA blocks
  17. describe the operation of an unsigned multiplier array constructed using full adders
  18. determine the full adder arrangement and organization (rows/diagonals) needed to construct an NxM-bit unsigned multiplier array
  19. determine the worst case propagation delay incurred by a practical (PLD-based) realization of an NxM-bit unsigned multiplier array
  20. describe the operation of a binary coded decimal (BCD) “correction circuit”
  21. design a BCD full adder circuit
  22. design a BCD N-digit radix (base 10) adder/subtractor circuit
  23. define computer architecture, programming model, and instruction set
  24. describe the top-down specification, bottom-up implementation strategy as it pertains to the design of a computer
  25. describe the characteristics of a “two address machine”
  26. describe the contents of memory: program, operands, results of calculations
  27. describe the format and fields of a basic machine instruction (opcode and address)
  28. describe the purpose/function of each basic machine instruction (LDA, STA, ADD, SUB, AND, HLT)
  29. define what is meant by “assembly-level” instruction mnemonics
  30. draw a diagram of a simple computer, showing the arrangement and interconnection of each functional block

Alumni Liaison

Basic linear algebra uncovers and clarifies very important geometry and algebra.

Dr. Paul Garrett