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= [[Peer_legacy |Peer Legacy]] for [[ECE337]]: ASIC Design Lab = | = [[Peer_legacy |Peer Legacy]] for [[ECE337]]: ASIC Design Lab = | ||
| − | * This class can be pretty cool, but some of the labs were extremely stressful. The course staff puts limits on the number of times a student can submit a solution and get feedback, which causes undue stress to students. Other than that, you can learn a lot in this class about FPGAs. The project is especially fun and a really great experience at self-management. For our project, we created a very simple 3D to 2D GPU. --- [[Larry Price]] | + | * This class can be pretty cool, but some of the labs were extremely stressful. The course staff puts limits on the number of times a student can submit a solution and get feedback, which causes undue stress to students. Other than that, you can learn a lot in this class about FPGAs. The project is especially fun and a really great experience at self-management. For our project, we created a very simple 3D to 2D GPU. --- [[User: lrprice|Larry Price]] |
*Write a comment. -sign your name/nickname. | *Write a comment. -sign your name/nickname. | ||
Latest revision as of 05:46, 24 April 2012
Peer Legacy for ECE337: ASIC Design Lab
- This class can be pretty cool, but some of the labs were extremely stressful. The course staff puts limits on the number of times a student can submit a solution and get feedback, which causes undue stress to students. Other than that, you can learn a lot in this class about FPGAs. The project is especially fun and a really great experience at self-management. For our project, we created a very simple 3D to 2D GPU. --- Larry Price
- Write a comment. -sign your name/nickname.
